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Home - IBM says new chip technology offers huge boost to wireless devices and networks
Chips - SemiconductorWireless

IBM says new chip technology offers huge boost to wireless devices and networks

by Sylvie Barak November 10, 2010
written by Sylvie Barak November 10, 2010 Share
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A whopping 6 trillion text messages were sent by mobile users across the planet last year, but computing powerhouse IBM Corp. believes that’s small fry, having just developed chip technology that can purportedly pump out those 6 trillion text messages in just 10 seconds.
The new chip-making technology is called the Cu-32 Custom Logic and was designed by IBM Research to dramatically increase the memory capacity and processing speeds of chips used in fiber-optic and wireless networks and in gear like routers and switches.
“Teens will have to type faster to keep up with the advances that IBM’s new chip technology holds for service providers,” an IBM rep told RCR Wireless News jokingly.
Indeed, so advanced are IBM’s silicon manufacturing techniques – having been developed with powerful mainframes and Unix computers in mind – they bring the most memory found on computer chips today (1 Gigabit) to chips it can then offer to network operators and phone makers for rather amazing value adds. Indeed, IBM’s embedded DRAM technology has advanced to a point where it can replace conventional on-chip static memory (SRAM) in many applications, taking up 60% less space on the chip, and consuming up to 90% less power.
Imagine, for example, being able to download a feature film to your phone in less than 10 seconds or in less than a minute for the HD version.
Impossible, you say? Think again, because IBM’s system of putting that much memory directly on the processor saves a lot of cycle time, allowing consumers to see really dramatic increases in speed.
A suite of new high-speed serial cores (HSS) give the Cu-32 advanced capabilities to network with more than a dozen different interface standards, while IBM’s silicon-on-insulator (SOI) process helps improve energy efficiency in chips using Cu-32. It’s also worth noting that Cu-32 delivers the industry’s first set of HSS cores in 32nm SOI technology. For the tech-heads out there, that means the tech includes:
• 15G Backplane core supporting 16G Fiber Channel standard;
• 15G Chip-to-Chip core supporting low-power optical and chip-to-chip applications;
• 28G Backplane core supporting 32G Fibre Channel standard;
• 6G standards core supporting PCI-Express Gen1 & Gen2 standards; and
• PCI-Express Gen3 core supporting PCI-Express Gen1, Gen2, and Gen3 standards.
IBM also uses a process known as high-k metal gate (HKMG) in its SOI technology, which is known to provide up to 25% chip performance improvement, up to 30% improved energy efficiency and twice the density compared with 45 nm SOI technology.
IBM has been quietly chipping away at improving chips for fiber-optic and cellular networks for a while now, and has already had a number of breakthroughs. A couple of months ago the firm introduced power-management technology taken directly from its Unix server chips which, when bunged into the right piece of consumer electronic kit, really gets bang for buck, something batteries have not been able to provide properly for some time.
IBM boasts its advanced semiconductors can now keep pace with the exploding number of Internet-connected devices and the tidal wave of data they are generating with products based on these chip technologies due to hit the market next year.
The firm also believes its technologies could be used in a vast array of machine-to-machine sensors that are just starting to really take off and use the Internet to transmit data on commuter traffic, buildings’ energy usage or even the health of newborn infants.

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