The old drivers for the advancement and miniaturisation of computing may be about spent, but there is plenty of innovation in the pipe during the next five years, Arm co-founder and chief technology officer Mike Muller told the Arm Research Summit in Cambridge, in the UK, today.
Muller noted Moore’s Law – the old rule-of-thumb for computing, that the number of transistors in a dense circuit doubles every two years – has flatlined, finally, after four decades of almost-perfect reliability.
However, cheaper and smarter manufacturing, combined with tougher and newer thinking, will continue to drive innovation in the short term, and new process technologies will drive it in the medium and long term. He warned the semiconductor industry its work will get harder, however.
“There won’t be some sudden death in the industry, where innovation stops. It is just the way you do innovation might change, and it might get a bit harder. Sorry, get over it,” said Muller.
The densification of high-performance integrated chips has relied until now on standard complementary metal-oxide-semiconductor (CMOS) process technology. In growth terms, CMOS has practically run its course. But Arm “does not care”, he explained.
“Moore’s Law is slowing, Moore’s Law is dead, Moore’s Law is over. It’s true, on one hand, however you want to put it. But I don’t care – Arm does not care.”
For Arm, in the business of embedded chips, there is innovation to be had around the edges, even as CMOS looks limited in the medium term.
“There’s this five year cloud of visibility over what the technology can do. And let’s take CMOS, and agree that, yes, it’s flattening. We just have to accept that’s what’s going to happen,” said Muller.
“For embedded [systems], which is where 70-80 per cent of Arm chips go, that’s fine… There is another 10-15 years of process technology that hasn’t yet been exploited.”
Further innovation will also hinge on lower manufacturing costs. “The modern technologies are really expensive, but there is the other law of manufacturing efficiency – that it gets easier to make those high-tech processes as it becomes just a manufacturing problem,” he said.
“So the cost of the high tech processes is going to fall… The market has loads of growth. I don’t think you need to worry.”
Newer design techniques, notably for three-dimensional integrated circuits, achieved by stacking silicon wafers (‘dies’) vertically, will also precipitate new gains in silicon design, said Muller.
“It’s a reality in how you manufacture flash chips, it’s a reality on what you do on big servers – where you take your large multi-core CPU, cut it into four smaller ones and stack them. The performance goes up, the yields go up. [That] infrastructure is on the leading edge. It’s expensive, but you can see how 3D buys a good few generations yet to come.”
But Muller warned the silicon industry will also be required to work harder, and think differently. Old programming techniques will not cut it anymore, he said, as new compute and machine learning powers come online.
“It’s a way of putting brain cycles into solving computational problems that is not just brute force and transistors. I see a whole growth in mobile based on all the underlying technologies, and doing better things in how you actually design systems.”
Beyond these changes and advances, which will buoy CMOS innovation during the next five years, new technologies will emerge, he said – such as “neuromorphics, spintronics, revolutions in the way analogue work[s], [and] all the way through to quantum photonics.”
Muller explained: “In the 10-15 [year] timeframe, there are new technologies that take us beyond CMOS. The conclusion of that is the end-products will just get better and better. Our jobs might get harder, but from consumer and industrial perspective, there isn’t going to be a slowing-down. They will have more and more performance.”
He added: “I don’t think there’s any slowing down in product innovation. We have no fears about that. Don’t worry about Moore’s Law. There’s plenty of innovation to be done – at silicon level, device level, circuit level, chip level, all the way through to the infrastructure and services on top.”
