Day in the life of a chip designer

Editor’s Note: This article is an excerpt from RCR Wireless News’ May Special Edition, “Enabling the Mobile Revolution: Mobile Chips, Devices and Accessories.” The 80-page special edition is available here.
Deep inside the bowels of a wide, glass-paneled three-story building in Austin, Texas, a group of engineers stands huddled around a whiteboard. Furiously scribbling and erasing, pointing and arguing, the group has been given a monumental task to complete on a microscopic scale.
They must create a system-on-a-chip that works faster and with greater performance than ever before, all while using less power, and on an area tiny enough to comfortably fit within the mobile devices of tomorrow.
While characters as frail as this reporter’s tremble at the prospect, these men and women thrive in the face of such a challenge.
Designing a SoC is a lengthy, trying, labor-intensive experience. While software issues can always be patched, hardware manufacturers are not given that luxury.
“We need to make sure we have all the bugs out once we ship,” says Travis Lanier, a product manager in ARM Ltd.’s process division.
There can easily be hundreds of people involved in the design of one chip, but there are three basic categories into which designers and engineers fall: architects, resistor-transistor logic (RTL) designers and the final back-end physical designers. While each group performs its own duties, the three are in almost constant communication.
Nvidia Corp.’s senior director of architecture Brian Cabral likens engineering a SoC to constructing a house. “Architects are the guys that make blueprints and design the parts. RTL designers build the house by writing the code that makes it work. The physical design team does the final work. They’re the ones that actually finish the chip and send it to the fabrication house,” says Cabral.
The design process begins with architects and marketers meeting to understand the general expectations of the upcoming processor. There are speed and performance expectations gleaned from consumer demand, and once a specific goal has been determined, the architects are given an assignment: make it happen.
For chip architects, this is the best part of their job; they love it. “There’s a stage right after the blank-paper stage, when you know vaguely the product you want to build and you sit down with other designers on a whiteboard and you’re designing, coming up with algorithms and cool ways of [implementing] these ideas,” says Cabral.
There is an incredible amount of collaboration during this time. Engineers can be seen grouped around whiteboards, furiously drawing away, while louder groups shut themselves into conference rooms and can be seen pointing animatedly through the blinds. Many times, once the whiteboard of a conference room has been filled, engineers will move to writing on the glass. It is from this creative collaboration, however, that the greatest innovations grow. “The outcome is greater than the sum of all the pieces,” explains Cabral.
Once the architects begin working on their design, they collaborate and share information with the RTL designers, who then begin coding and creating the logical “brain” of the SoC.
During the entire process, RTL designers are in constant contact with validation teams, who are sometimes literally peering over the designers’ shoulders. Their job is to make sure the logic works as it should.
There are also implementation teams that take RTL designers’ logical interpretations and turn them into actual transistors to get a sense of the expected power consumption of the end product. Validation and testing may seem tedious, but when making an embedded piece of hardware both are essential.
Much like the architects before them, RTL designers cite the creative aspect of their work as the most fulfilling. Boris Alvarez, a senior design engineer for ARM, most enjoys creating the micro-architecture of his unit.
“It’s a large challenge to choose a good micro-architecture, and there is a lot of pleasure when you see it first working in simulation, and starting to interact with the other units of the microprocessor,” says Boris, adding that the right amount of ingenuity and innovation at this point in the chip design process can lead to a patent.
The next stage in the chip design process becomes the responsibility of the back-end engineers. These engineers are responsible for timing the chip, making sure signals get from one side of the processor to the other, and that everything works synchronously. As the validation process is completed, there is continuous iteration between the back-end and RTL engineers, as well as consultation with the architects themselves.
Just as the architects need to be aware of what is possible with regard to time, cost and material availability in their design phase, the back-end engineers must be aware of various design restrictions. In this step, as in those previous, good communication and collaboration is vital.
After all the steps are completed – in what usually takes between 18 months to two years – the completed design is sent to the fabrication house, and the process begins anew.
Unsurprisingly, chip designers are presented with many challenges along the way.
Like archers in a hurricane, chip engineers sometimes find themselves aiming at a moving target. It’s not uncommon for customers to request changes in functionality right in the middle of the design phase, notes Alvarez, explaining that in some cases his team then has “to change the product, put in new features.” This, he says, is the greatest challenge: meeting that ever-evolving and elusive goal of “low power, efficiency and performance.”
To Cabral at Nvidia, the real challenge is understanding and balancing constraints, like the size, speed and features of a processor. Properly and explicitly identifying your constraints and boundaries is important, he maintains.
“Everybody wants all the features they can possibly get into a chip in the lowest power in the smallest area in a week. The art of engineering is operating underneath all those constraints and identifying those constraints,” Cabral said.
Meanwhile, ARM sees mobile as an avenue through which to showcase its strengths and differentiate its products. “A key thing people wish for is not necessarily better performance, but better battery life,” says Travis Lanier, a product manager at ARM. “When you get your next phone, you do wish it does more, but you really wish it had a little more battery life.”
SoC designers need to be aware of what their customers will want before their customers even request it. “They always want it sooner and they want it better than what you can easily deliver, so you want to keep an eye down the horizon,” says Lanier.
ARM’s view, unlike that of its bigger chip rival Intel Corp., is that speed is not the future of CPUs. “For a long time there was faster and faster, but then you hit a wall and you realized there’s not much functionality coming from it,” argues Lanier. Instead, ARM focuses on lower power, which he says “has been a game changer for us.”
It is in this push for longer battery life that ARM believes it can excel, as it continually pushes for ever-lower power usage in its CPUs. As people put more information on mobile devices, they’re going to run more frequently without shutting off, according to Lanier, who reiterates that low-power, rather than extreme performance, is the future of CPUs.
On the other hand, while it recognizes that efficiency is certainly important as SoCs move forward, Nvidia sees high-end multimedia performance as an integral aspect of mobile life.
“You’re going to want to play HD video on your handheld device, play the latest coolest games, you’re
going to want to take pictures, and you may want to do
all of those at the same time,” asserts Cabral.
He goes on to cite the example of augmented reality, a graphics-intensive process in which digital content added to regular old reality can be seen and interacted with only through a mobile device.
Travelers with smartphones can already experience augmented reality in certain hot spots by aiming their devices at, say, the Eiffel Tower and suddenly seeing a host of interesting facts and notations pop up on the screen, or even a view of what Paris looked like in the year before its construction. This type of functionality will only become more common in time.
Thus, in order to meet the coming challenges, especially from the mobile market, both ARM and Nvidia have had to innovate. Nvidia has worked to create what it says are among the most parallel GPUs in the world. It says the trend of greater and greater parallelism is not going to stop, and it intends to be at the forefront of the visual computing revolution.
ARM has similarly refused to lag behind in any space. Though well-known for its low-power processors, the company has worked hard to build buzz with regard to its CPU speed capabilities.
The Cortex-A8 was not only the first superscalar ARM core, but it was also the first to break the 1 GHz frequency barrier. The Cortex-A9 went out-of-order superscalar and, according to Lanier, allowed the firm “to exploit both instruction level and thread level parallelism for greater performance gains.” No one said keeping up with modern consumer demand was easy.
In many ways, the work chip designers do is incredible; to fit so much raw intelligence and computational power in an area so small is a true testament to human ingenuity, and the innovation in the space doesn’t appear to be slowing down. With technology moving at the pace it is, the chip space will prove one to watch over the coming years.